The present invention relates to a semiconductor device including a bipolar transistor and a method for manufacturing the same.
FIG. 8 is a cross-sectional view showing the structure of a typical bipolar transistor described in, for example, Japanese Laid-Open Patent Publication No. 2004-87599. As shown in FIG. 8, the bipolar transistor 50 includes an N-type conductive layer collector region 52, which is formed in a P-type silicon substrate 51 through ion implantation, and a P-type conductive layer base region 53 and an N-type conductive layer emitter region 54, which are formed on a main surface S of the P-type silicon substrate 51.
A shallow trench isolation (STI) structure 55 is formed on the main surface S of the P-type silicon substrate 51. The STI structure 55 is formed by embedding an oxide film in a trench formed through anisotropic etching. The STI structure 55 isolates two insulated active regions 56 and 57 of the main surface S. A collector leading portion 58 made of an N-type high concentration layer is formed in the active region 56. The base region 53 and the emitter region 54 are formed on the active region 57.
The collector region 52 includes a high concentration layer 52a, which is formed at a location deeper than the lower end of the STI structure 55 and has a particularly high concentration of the N-type impurity. The high concentration layer 52a functions as a main conductive path in the collector region 52 during conduction between the collector and emitter. The concentration of the N-type impurity in the vicinity of the main surface S is low in the collector region 52. The curve L1 in FIG. 9 shows an example of the N-type impurity concentration distribution in the collector region 52.
The reduction of collector resistance is effective for improving the transistor properties of the bipolar transistor 50. The reduction of collector resistance is easily accomplished by increasing the implantation amount of the N-type impurity when forming the collector region 52. The N-type impurity concentration distribution of the collector region 52 in such a case is shown by curve L2 in FIG. 9. The concentration of the N-type impurity in the vicinity of the collector leading portion 58 is increased to reduce the collector resistance. However, the concentration of the N-type impurity near the interface of the collector region 52 and the base region 53 also increases when simply increasing the impurity implantation amount. This lowers the breakdown voltage BVceo between the emitter and collector.
The collector resistance can also be reduced by forming the collector leading portion 58 at a deep location. However, when forming the collector leading portion 58 at a deep location, the collector leading portion 58 becomes enlarged in the lateral direction. This may cause short-circuiting between the emitter and collector.
A semiconductor device that reduces collector resistance while avoiding reduction of the breakdown voltage BVceo between the emitter and collector is described in Japanese Laid-Open Patent Publication No. 2004-79719. As shown in FIG. 10, Japanese Laid-Open Patent Publication No. 2004-79719 describes a bipolar transistor 50a with a high concentration implantation layer 59 having an N-type impurity concentration that is higher than that of collector region 52. The high concentration implantation layer 59 is formed in parts of the collector region 52 excluding the region immediately below base region 53. In the bipolar transistor 50a with the high concentration implantation layer 59, the concentration of the N-type impurity in the vicinity of collector leading portion 58 is locally increased without increasing the concentration of the N-type impurity near the base region 53. Thus, the collector resistance is reduced while preventing the breakdown voltage BVceo between the emitter and collector from being lowered.
However, the N-type impurity concentration distribution in both of the collector region 52 and the high concentration implantation layer 59 must be controlled with high accuracy to obtain the desired property. This is difficult to accomplish during manufacturing processes. If the high concentration implantation layer 59, which has a high impurity concentration, is formed in a wide range at a deep location, this may hinder the insulation isolation with the STI structure 55 and cause short-circuiting between the emitter and collector.